Preventing Timing Side Channels in High Level Synthesis
A type system extension to enable secure HLS without timing side channels
A type system extension to enable secure HLS without timing side channels
A simple project I made during AmeriHac to learn more about Haskell
Published:
I presented in-progress work on developing a type system to automically perform energy cost analysis for embedded systems with stateful peripherals.
Workshop, University 1, Department, 2015
Student Taught Initiated Course, University of Maryland, Department of Computer Science, 2026